All GPUs are organized in multi-level hierarchies. Nvidia has GPCs that contain TPCs which contain SMs (probably the closest thing to a “core”) which are split into partitions containing the actual ALUs. There’s quite a lot of other hardware spread out over these different levels like caches, fixed function units like blending or texture filtering, etc.
You can find more details in documents like these:
All GPUs are organized in multi-level hierarchies. Nvidia has GPCs that contain TPCs which contain SMs (probably the closest thing to a “core”) which are split into partitions containing the actual ALUs. There’s quite a lot of other hardware spread out over these different levels like caches, fixed function units like blending or texture filtering, etc.
You can find more details in documents like these:
https://images.nvidia.com/aem-dam/Solutions/Data-Center/l4/nvidia-ada-gpu-architecture-whitepaper-v2.1.pdf
https://www.amd.com/content/dam/amd/en/documents/radeon-tech-docs/instruction-set-architectures/rdna3-shader-instruction-set-architecture-feb-2023_0.pdf
https://cdrdv2-public.intel.com/758302/introduction-to-the-xe-hpg-architecture-white-paper.pdf